Hi all. I'm new to Amaranth and HDLs in general (mostly a software background) but I have done some Verilog. I'm using an iCEBreaker FPGA and I'd like to hookup the on-board button to the reset signal. I've tried this:

```
        button = platform.request("button")
        button_sync = Signal()
        m.submodules.button_synchronizer = FFSynchronizer(button.i, button_sync)
        m.d.comb += ResetSignal().eq(button_sync)
```

But it is throwing an exception:

```
amaranth.hdl._ir.DriverConflict: Signal (sig rst) bit 0 driven from module top.cd_sync at <redacted>/python-3.13/lib/python3.13/site-packages/amaranth/vendor/_siliconblue.py:424 and module top at <redacted>/icebreaker_top.py:243
```

I must be misunderstanding something fundumental here, so any help would be appreciated.