IMO the issues are
- svd2rust generates quite bloated code (chiptool generates 2-3x less code than svd2rust given the same SVD, and the resulting PAC compiles 2-3x faster).
- SVDs have an *extreme* amount of redundancy (e.g. copying a reg or field N times instead of using arrays, copying the same enum N times, duplicating entire peripehrals). I've had PACs build 5-10x faster from removing all that redundancy. Even for "supposedly good" SVDs like nRFs)

If you take care of these two issues when making a PAC you get pretty acceptable build times even in the biggest chips. No need for splitting crates or cfgs.

example: `nrf52840-pac` builds in 4.8s, `nrf-pac` builds in 1.1s