Hello again, I'm trying to make sure what I'm looking at is a bug. I'm pretty unfamiliar with amaranth, so I might be missing something.

the code in pulse_tclk sets the BIT_AUX_TCLK_TOGGLE aux signal, which then triggers the state machine to set the tclk to itself ```m.d.sync += self.tclk.eq(self.tclk)```. I expect a toggle would invert this signal, but again, this is the first time I've looked at this library.
```


class SpyBiWireProbeInterface(JTAGProbeInterface):
    def _log_s(self, message, *args):
        self._logger.log(self._level, "SBW: " + message, *args)

    async def pulse_tclk(self, count):
        self._log_s("pulse tclk count=%d", count)
        await self.enter_run_test_idle()
        await self.set_aux(BIT_AUX_TCLK_TOGGLE)
        await self.pulse_tck(count)
        await self.set_aux(0)
```

and relevant state machine that uses tclk_toggle code:                    

```
          with m.State("TDI-SETUP"):
                with m.If(timer == quart_cyc):
                    # This logic follows "Synchronization of TDI and TCLK During Run-Test/Idle" in
                    # section 2.2.3.5.1.
                    with m.If(self.tclk_latch | self.tclk_toggle):
                        m.d.sync += bus.sbwtd_o.eq(self.tclk)
                    with m.If(self.tclk_latch):
                        m.d.sync += self.tclk.eq(self.tclk_level)
                    with m.Elif(self.tclk_toggle):
                        m.d.sync += self.tclk.eq(self.tclk)
```

if this is a bug,  I don't see any code that uses pulse_tclk, so it might not have been noticed.