hey all, can anyone help me figure out why the usb_serial.rs example (https://github.com/embassy-rs/embassy/blob/main/examples/stm32l4/src/bin/usb_serial.rs) is not working? when connecting the usb i get the following in my dmesg ``` usb 1-2.4.2: new low-speed USB device number 67 using xhci_hcd usb 1-2.4.2: device descriptor read/64, error -32 usb 1-2.4.2: device descriptor read/64, error -32 usb 1-2.4.2: new low-speed USB device number 68 using xhci_hcd usb 1-2.4.2: device descriptor read/64, error -32 usb 1-2.4.2: device descriptor read/64, error -32 usb 1-2.4-port2: attempt power cycle usb 1-2.4.2: new low-speed USB device number 69 using xhci_hcd usb 1-2.4.2: Device not responding to setup address. usb 1-2.4.2: Device not responding to setup address. usb 1-2.4.2: device not accepting address 69, error -71 usb 1-2.4.2: new low-speed USB device number 70 using xhci_hcd usb 1-2.4.2: Device not responding to setup address. usb 1-2.4.2: Device not responding to setup address. usb 1-2.4.2: device not accepting address 70, error -71 usb 1-2.4-port2: unable to enumerate USB device ``` i had to edit the clocks configuration (which is probably the cause of the issue) because "Hsi48Config" is not available on my stm32l746rg here's my clocks configuration: ``` let mut config = Config::default(); // set the internal clock to run at max (80MHz) config.rcc.hsi = true; config.rcc.hse = Some(embassy_stm32::rcc::Hse { freq: Hertz(8_000_000), mode: embassy_stm32::rcc::HseMode::Oscillator, }); config.rcc.pll = Some(embassy_stm32::rcc::Pll { source: embassy_stm32::rcc::PllSource::HSE, mul: embassy_stm32::rcc::PllMul::MUL10, divp: Some(embassy_stm32::rcc::PllPDiv::DIV7), divq: Some(embassy_stm32::rcc::PllQDiv::DIV2), divr: Some(embassy_stm32::rcc::PllRDiv::DIV2), prediv: embassy_stm32::rcc::PllPreDiv::DIV1, }); // USB config.rcc.pllsai1 = Some(embassy_stm32::rcc::Pll { source: embassy_stm32::rcc::PllSource::HSE, prediv: embassy_stm32::rcc::PllPreDiv::DIV1, mul: embassy_stm32::rcc::PllMul::MUL12, divp: None, divq: Some(embassy_stm32::rcc::PllQDiv::DIV2), divr: None, }); config.rcc.mux.clk48sel = embassy_stm32::rcc::mux::Clk48sel::PLLSAI1_Q; config.rcc.sys = embassy_stm32::rcc::Sysclk::PLL1_R; config.rcc.ahb_pre = embassy_stm32::rcc::AHBPrescaler::DIV2; config.rcc.apb1_pre = embassy_stm32::rcc::APBPrescaler::DIV1; config.rcc.apb2_pre = embassy_stm32::rcc::APBPrescaler::DIV1; config.rcc.mux.adcsel = embassy_stm32::rcc::mux::Adcsel::SYS; ``` any idea?