has anyone ever tried to get embassy-executor, riscv, riscv-rt working on rv32e architecture?

Playing around with it right now, and running into strange issues (misaligned instruction fetch trap). 

Checking the code a bit, it seems it does know how to handle the reduced registers of rv32e.

Probably I am asking a bit much from the toolchain, I use a custom target json to enable what my cpu core supports and is tested.

rv32ea + Zicsr