```
def clocking_proc():
    while True:
        yield Tick("a")
        yield Tick("b")

base_clock = 1e-6
sim.add_process(clocking_proc)
sim.add_clock(base_clock, phase=0, domain="a")
sim.add_clock(base_clock, phase=base_clock/2, domain="b")
```
For reference, that works nicely