the *d* pins are output by default: ```def SRAMResource(*args, cs_n, oe_n=None, we_n, a, d, dm_n=None,
                 conn=None, attrs=None):
    io = []
    io.append(Subsignal("cs", PinsN(cs_n, dir="o", conn=conn, assert_width=1)))
    if oe_n is not None:
        # Asserted WE# deactivates the D output buffers, so WE# can be used to replace OE#.
        io.append(Subsignal("oe", PinsN(oe_n, dir="o", conn=conn, assert_width=1)))
    io.append(Subsignal("we", PinsN(we_n, dir="o", conn=conn, assert_width=1)))
    io.append(Subsignal("a", Pins(a, dir="o", conn=conn)))
    io.append(Subsignal("d", Pins(d, dir="io", conn=conn)))
    if dm_n is not None:
        io.append(Subsignal("dm", PinsN(dm_n, dir="o", conn=conn))) # dm="LB# UB#"
    if attrs is not None:
        io.append(attrs)
    return Resource.family(*args, default_name="sram", ios=io)
```