"@mcc111: what is the reason..." <- hi— so catherine wrote this code— i will understand as best i can in amaranth a "Platform" is used to generate the "top". right? however on Analogue OpenFPGA, the "top" is supplied by something called APF, for Analogue Platform Framework. This is a big wad of glue Verilog, it's entirely uncommented and you can't really change it. When writing regular Analogue OpenFPGA cores you write your code in a "core_top.v" file, which *pretends* to be a top, but is actually interfacing with APF. this means you can't use a "real" amaranth platform because the amaranth platform, regular IntelPlatform or whatever, will try to do things that will conflict with APF. So Catherine created this "pseudo-platform" which supplies the functions necessary for Amaranth to work at all, but it's not a platform, it just plugs into APF. I believe Catherine has plans for a more sophisticated solution later.