I say:
                        `audgen_high.eq( audgen_osc_wave.bit_select( 4-(self.rotate1_counter + (self.rotate2_counter == 3)) , 1 ) )`
I get:
```
    return Part(self, offset, width, stride=1, src_loc_at=1)
           ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
  File "C:\Users\Andi\work\f\analogue-core-template-amaranth\src\fpga\amaranth_core\.venv\Lib\site-packages\amaranth\hdl
\ast.py", line 870, in __init__
    raise TypeError("Part offset must be unsigned")
```
Is the correct fix to… put the 4- expression in a 4-bit unsigned counter?
Or am I going about this wrong to start with?
rotate1_counter and rotate2_counter are both 2-bit