Say you use an FPGA for prototyping. You write a program in Amaranth or Verilog or SystemVerilog or whatever. Your circuit works in hardware, it's running on your FPGA at 200MHz.

Now that you've verified your prototype, I assume you can go ahead and get a "real" IC fabbed. How bumpy is the process of going from that Verilog design to a "real IC"?

Can IC CAD just plain accept an HDL file and synthesize a true circuit? Can that circuit run at "CPU speeds" (4-6ghz range)?
Or can you not directly reuse the HDL file, but the process of converting from an HDL to whatever it is you use for "real circuit" design now straightforwardly follows the logic plan laid out by your HDL?
Or do you have to design the circuit significantly from the ground up because things like the timing and routing characteristics of a true IC simply are not the same as they are within an FPGA?