class IODelay(wiring.Component):
    i: In(1)
    o: Out(1)

    def __init__(self, length=1):
        self.length = length
        super().__init__()

    def elaborate(self, platform):
        m = Module()

        i = self.i
        for n in range(self.length):
            o = Signal()
            m.submodules[f"lut{n}"] = Instance("SB_LUT4",
                a_keep=1,
                p_LUT_INIT=C(2, 16),
                i_I0=i,
                i_I1=C(0),
                i_I2=C(0),
                i_I3=C(0),
                o_O=o)
            i = o
        m.d.comb += self.o.eq(o)

        return m