I could never understand how to setup PCIe with Vivado-provided IPs...
Good thing about Riffa framework :
- there is an example design for board ZC706 !
- driver is really easy to use, HW side too
- the HW interface provides a user clock
- the HW interafce is supposed to work with any user-provided clock (not tried though)
Some drawbacks :
- development is reduced to basic maintenance since several years now, some reported issues would really deserve a fix but that's complex task
- no guide to add support for newer boards or PCIe endpoint versions
- exposed interface on HW size is a form of Riffa-specific FIFO that resembles AXI but is not. Maybe a protocol converter could be written.