Ok, seeing the difference, I re-flashed the firmware of the ST-Link (using STM32 Cube programmer) and I get something that makes more sense now:
```
 probe-rs info
Probing target via JTAG

 WARN probe_rs::probe::stlink: send_jtag_command 242 failed: JtagUnknownJtagChain
Error identifying target using protocol JTAG: An error with the usage of the probe occurred

Probing target via SWD

 WARN probe_rs::probe::stlink: send_jtag_command 242 failed: SwdApWdataError
ARM Chip with debug port Default:
Debug Port: DPv2, Designer: STMicroelectronics, Part: 0x4850, Revision: 0x1, Instance: 0x00
├── 0 MemoryAP
│   └── Error during access: The debug probe encountered an error.
└── 1 MemoryAP
    └── ROM Table (Class 1), Designer: STMicroelectronics
        ├── ROM Table (Class 1), Designer: ARM Ltd
        │   ├── Cortex-M4 SCS   (Generic IP component)
        │   │   └── CPUID
        │   │       ├── IMPLEMENTER: ARM Ltd
        │   │       ├── VARIANT: 1
        │   │       ├── PARTNO: Cortex-M7
        │   │       └── REVISION: 2
        │   ├── Cortex-M3 DWT   (Generic IP component)
        │   ├── Cortex-M7 FBP   (Generic IP component)
        │   └── Cortex-M3 ITM   (Generic IP component)
        ├── Cortex-M7 ETM   (Coresight Component)
        └── Coresight Component, Part: 0x0906, Devtype: 0x14, Archid: 0x0000, Designer: ARM Ltd


Debugging RISC-V targets over SWD is not supported. For these targets, JTAG is the only supported protocol. RISC-V specific information cannot be printed.
Debugging Xtensa targets over SWD is not supported. For these targets, JTAG is the only supported protocol. Xtensa specific information cannot be printed.
```