From the Cortex-m perspective it doesn't matter if it's an nvm or ram etc. (The reference soc implemented on the FPGA based MPs boards mainly use ram as the code area).
 
In my experience, the flash based memory use an and-masking technique for writing. So you erase a page bringing every bits to 1 and you can then write as many time as you want until all bits are 0.
But you can only flip 1->0. Never 0->1.
 
That being said, there's other nvm (like mram) that may work differently.